We’re pleased to announce a comprehensive update to SiFive’s RISC-V IP Portfolio with the SiFive 20G1 release. This release brings important enhancements and new capabilities to SiFive Core IP, the industry’s broadest RISC-V IP Portfolio, ranging from the ultra-capable SiFive U7-Series to the extremely popular SiFive E2-Series, offering up to 2.8x more performance(1); up to 25% lower power(2); and up to 11% smaller area(3). For a deep dive into the details of this exciting release, please register for my SiFive Connect webinar.
SiFive offers processor cores based on the free and open RISC-V ISA – after all, SiFive was founded by the inventors of RISC-V. The mission of SiFive is to enable the development of domain-specific silicon, and market feedback combined with SiFive customer experience tells us that a processor core must include all of the necessary components to integrate, secure, and develop software for the CPU core – SiFive Shield, and SiFive Insight.
SiFive Insight is the industry’s first pre-integrated debug and trace IP for RISC-V processor cores, enabling faster silicon bring-up, software/hardware integration, and application development.
Uniquely, SiFive Insight features native Arm® CoreSight™ compatibility. By seamlessly integrating with Arm® CoreSight™, developers can integrate SiFive RISC-V based cores into mixed ISA designs and maintain their existing development environment. SiFive Insight has broad industry support from leading software companies such as Green Hills Software, IAR Systems, Lauterbach, SEGGER, with SiFive Freedom Studio free tools also available.
There are several key enhancements to SiFive Core IP in the SiFive 20G1 release to improve power, performance, and area (PPA). Enhancements to the high-performance U7-Series application processor have reduced power consumption by more than 25%(2), while increasing load bandwidth up to 2.8x for streaming data applications such as those in AI Acceleration applications(1).
The SiFive E3- and E7-Series are now available with the RISC-V “Embedded” extension, RV32E, delivering an area reduction of up to 11%(3) compared to RV32I to further improve PPA for these cores. Based on customer feedback, RV32E will be a very popular option for product designers who need area-constrained high-performance embedded CPUs. The SiFive 3-, 5-, and 7-Series cores have been refreshed with new, enhanced real-time capabilities, bringing deterministic performance for high-reliability designs to SiFive’s winning product portfolio.
SiFive’s advanced platform engineering expertise enables our roadmap development to be quickly integrated and validated on FPGAs to rapidly test improvements and new features of our product line. SiFive includes FPGA bitstreams in customer packages to enable high-performance software-development platforms, now including the VCU118 based on the Xilinx UltraScale+ family of FPGAs, offering a software development platform for the entire SiFive Core IP portfolio including large multi-core configurations.
The award-winning SiFive Core Designer cloud-based development application for configuring your own processor core ties the SiFive 20G1 release together, making SiFive Core IP simple and easy to work with. In the SiFive 20G1 release, we adopt a new version scheme by moving from “year/month” naming to “year/release.” The SiFive 20G1 release is the first General Release of 2020, and encapsulates 9 months of hard work and progress at SiFive as we move to a new release schedule driven by our roadmaps and aligned to customer engineering cycles. SiFive Core Designer allows chip-designers to fine-tune a SiFive processor to meet their workload requirements, selecting which features and functionality are required.
SiFive Shield, an open, scalable platform architecture designed to enable whole SoC security for RISC-V, is pre-integrated into SiFive Core IP and configured via SiFive Core Designer. Freshly added in the SiFive 20G1 release is support for the SiFive Shield Hardware Cryptographic Accelerator (HCA) IP add-on option.
SiFive HCA IP offers a configurable mix of AES, SHA, and TRNG functions to enable secure Root of Trust and hardware-accelerated cryptographic functions. SiFive Shield HCA is configured using SiFive Core Designer and is pre-integrated and verified along with SiFive Core IP deliverables, including accompanying documentation, software, and drivers.
In software discussions, one of the first questions we get asked is about the FreeRTOS™ real-time operating system. FreeRTOS support for RISC-V was integrated into the official FreeRTOS releases in early 2019, and the SiFive Freedom E SDK now includes FreeRTOS v.10, with source code and build scripts integrated into the SDK. Alongside the FreeRTOS kernel, the SiFive Freedom E SDK features several FreeRTOS-based examples, including using Physical Memory Protection (PMP) to enable secure runtime operations.
The SiFive Freedom E SDK board support packages (BSP) have been upgraded to include System View Description (SVD) files, bringing tighter integration into debug environments.
SiFive Freedom Studio enables faster development of new products through enhanced support for SiFive Insight Advanced Trace and Debug including new views of trace flow to speed up debugging.
The SiFive 20G1 release offers impressive PPA improvements combined with new pre-integrated SiFive Insight trace and debug to save time and effort with SiFive’s unique support for Arm® CoreSight™ to minimize workflow disruption, and broad tool ecosystem support. Defining and adopting a high-performance, high-efficiency, secure RISC-V processor using SiFive Shield security features and add-on options for your next application or real-time SoC has never been more attractive with SiFive.
We can’t wait to engage with customers on the incredible new devices they’ll build using the substantial new capabilities of the faster, more efficient, more capable than ever SiFive Core IP portfolio.
(1) – 2.8x higher performance based on SiFive internal engineering measurement of improving performance in memory-intensive workloads running on a SiFive U7-Series processor core; when normalized the SiFive U7-Series processor (19.08) offers 36% of the performance of the SiFive U7-Series processor (20G1).
(2) – 25% lower power based on SiFive internal engineering measurement of SiFive U74 processor (20G1) core power consumed while running Dhrystone benchmark as compared to SiFive U74 processor (19.08); when normalized the SiFive U74 (19.08) processor offers 133% of the power consumption of the SiFive U74 (20G1) processor.
(3) – 11% area reduction based on SiFive internal engineering measurement of SiFive E3-Series area using RISC-V Embedded extension RV32E in 28nm process technology vs. RV32I; when normalized the SiFive E3-Series (19.08) measures 112% larger area of the SiFive E3-Series (20G1), using 28nm process technology.
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